ASIC Engineer

Meet the Team
Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust.

Your Impact

• Implementation of DV infrastructure for block, cluster, and TOP-level environments.
• Maintaining existing DV environments and enhancing them.
• Ensuring complete verification coverage through implementation and review of code and functional coverage.
• Working closely with architects and designers to ensure verification completeness
• Supporting tests done with emulation and engaging in tasks to prepare for post-silicon-validation.

Minimum Requirements:

• Bachelor's or master's degree in Electrical or Computer Engineering or any other relevant field.
• 2+ years of ASIC verification experience.
• Experience working in System Verilog/UVM.
• Familiarity with ASIC design and verification processes, methodology, and tools.
• Strong debugging skills (post-silicon lab bring-up experience is a plus).
• Excellent verbal and written communication skills in English.

Preferred Qualifications:

• Understanding of object-oriented programming principles, constrained random stimulus, and a coverage-driven verification approach.
• Knowledge of Networking ASIC design verification.
• Experience with formal verification (logic equivalency checking).
• Knowledge of C/C++, SystemC, Linux.
• Scripting experience (Python, Perl, TCL, shell programming).
• Collaborative and team-focused approach.

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