Manager - Silicon Design Verification

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences – from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE:

A hardware and firmware co-design/verification manager role in our silicon based Security IP (SECIP) development team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified. These subsystem IPs provide high performance functions to System on Chip (SoC) products across all AMD business units such as client computers, servers, discrete graphics, and gaming. Our HW/FW co-verification engineers will work on subsystem feature based and application level use case based HW/FW co-verification for a variety of embedded MP subsystems. Your expertise will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem applications.

THE PERSON:

An experienced hardware/firmware co-design/verification leader with strong records of technical leadership and hands-on execution to meet block level IP and MP subsystems design and verification project milestones.  A technical mentor and forward-thinking leader who demonstrated strong capability in establishing advanced design verification methodology and workflow, anticipating/analyzing/resolving technical and planning issues, and enjoyed interacting with team members. A strong written and verbal communicator with strong problem solving and attention to detail skills along with professional interpersonal communication capability.

KEY RESPONSIBILITIES:

• Lead development and debugging of performance/functional IP models, subsystem level firmware APIs, verification firmware and firmware tests by using object-oriented programming (OOP) techniques onto embedded microprocessors or using C-DPI directed test methodology and infrastructure.
• Leverage IP level and MP subsystem SystemVerilog/UVM based hardware verification infrastructure, testbenches, test methodology and infrastructure, develop subsystem hardware feature based and/or application level use case based firmware and firmware tests on embedded MP subsystems, perform HW/FW co-verifications.
• Manage test debugging process and regression result triaging, resolve technical issues with IP design, verification, and IP user teams, to improve IP and Subsystem quality and to support user team's applications.
• Participate in IP and Subsystem specification, influence IP micro-architecture development (design for verification, application aspects), apply the reusable test methodology across individual IP and MP subsystems.
• Collaborate with IP design and higher level system IP user teams to develop advanced application use cases, to support higher level system applications.
• Collaborate with other technical leads on process, methodology, and technical enhancements for verification firmware development, and drive continuous improvement and positive changes.

PREFERRED EXPERIENCE:

• Strong Leadership experience in verification firmware development
• Strong Technical Managerial experience in leading, mentoring and coaching a team
• Excellent C, C++ and object oriented programming background
• Strong MP subsystem level firmware and hardware driver coding ability
• Proven understanding of embedded microprocessor and subsystem architectures
• Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
• Proven skills on embedded MP subsystem level debugging techniques and tools
• Prior experience for pre-silicon firmware verification on RTL simulator, FPGA system or emulation platform

ACADEMIC CREDENTIALS:

• BSc or MSc degree with strong Technical Leadership in firmware development experience on embedded MP subsystems

LOCATION:  Belgrade, Serbia 

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.