Staff Design Verification Engineer, AI HW

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are seeking an experienced Staff Level Design Verification Engineer to join our dynamic and innovative team. As a Staff Design Verification Engineer, you will play a critical role in ensuring the quality and reliability of our digital designs through comprehensive verification methodologies. The successful candidate will have a strong background in verification techniques, excellent problem-solving skills, and a passion for delivering high-quality designs.

This role is hybrid based out of Belgrade, Serbia.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Senior verification expert with a proven record of validating complex, high-performance digital designs from concept to silicon.
• Strong command of UVM, SystemVerilog, and advanced verification methodologies, with a deep understanding of RTL design and system-level behavior.
• Comfortable operating as a technical lead—guiding verification strategy, mentoring engineers, and driving closure across large-scale programs.
• Highly analytical and hands-on, with strong communication skills and a drive to deliver silicon that works exactly as designed.

What We Need

• Define and lead verification strategies for major IP and subsystem blocks across AI and compute architectures.
• Architect and maintain reusable, scalable UVM environments and verification infrastructure to support multi-site development.
• Drive coverage convergence, debug complex design and performance issues, and ensure quality signoff ahead of tape-out.
• Collaborate with design, architecture, and validation teams to improve design-for-verification practices and streamline bring-up cycles.

What You'll Learn

• How Tenstorrent verifies cutting-edge, massively parallel compute architectures for next-generation AI workloads.
• Advanced techniques for functional and formal verification at scale, using modern simulation and emulation platforms.
• System-level debug workflows that span hardware, firmware, and compiler layers.
• How architectural choices made early in design flow through to power, performance, and functional validation outcomes.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.